
30
AT89C51ID2
4289C–8051–11/05
Registers
Table 24. AUXR Register
AUXR - Auxiliary Register (8Eh)
Reset Value = XX00 10’HSB. XRAM’0b
Not bit addressable
76
543
210
-
M0
XRS2
XRS1
XRS0
EXTRAM
AO
Bit
Number
Bit
Mnemonic
Description
7-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5M0
Pulse length
Cleared to stretch MOVX control: the RD/ and the WR/ pulse length is 6 clock
periods (default).
Set to stretch MOVX control: the RD/ and the WR/ pulse length is 30 clock
periods.
4XRS2
XRAM Size
XRS2XRS1XRS0XRAM size
0
0256 bytes
0
1512 bytes
0
1
0768 bytes(default)
0
1
11024 bytes
1
0
01792 bytes
3XRS1
2XRS0
1
EXTRAM
EXTRAM bit
Cleared to access internal XRAM using movx @ Ri/ @ DPTR.
Set to access external memory.
Programmed by hardware after Power-up regarding Hardware Security Byte
(HSB), default setting, XRAM selected.
0AO
ALE Output bit
Cleared, ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if
X2 mode is used). (default) Set, ALE is active only during a MOVX or MOVC
instruction is used.